Craig Zilles
  Associate Professor of Computer Science
short biography

Research Interests
  learning analytics, computer-based testing, plagiarism detection, computer architecture, compiler construction, dynamic optimization.

Research Projects
  • The Computer-based Testing Facility and Learning Analytics
  • Hardware/Software Co-designed Run-times for Managed and Dynamic Languages
  • Transactional Memory
  • Efficient Microarchitectures
  • Concept Inventories for Computer Science (CS Education)
  • Master/Slave Speculative Parallelization
  • Selected recent publications
  • Making Testing Less Trying: Lessons Learned from Operating a Computer-Based Testing Facility (FIE 2018)
  • How much randomization is needed to deter collaborative cheating on asynchronous exams? (Learning@Scale 2018)
  • Student and Instructor Experiences with a Computer-Based Testing Facility (EDULEARN 2018)
  • Towards a Model-Free Estimate of the Limits to Student Modeling Accuracy (EDM 2018)
  • Do Performance Trends Suggest Wide-spread Collaborative Cheating on Asynchronous Exams? (Learning@Scale 2017)
  • Investigating Student Plagiarism Patterns and Correlations to Grades (SIGCSE 2017)
  • Modeling Student Scheduling Preferences in a Computer-Based Testing Facility (Learning@Scale, 2016)
  • Bungee Jumps: Accelerating Indirect Branches through HW/SW Co-Design (Micro 2015)
  • Branch Vanguard: Decomposing Branch Functionality into Prediction and Resolution Instructions (ISCA 2015)
  • Computerized Testing: A Vision and Initial Experiences (ASEE 2015)
  • A Psychometric Evaluation of the Digital Logic Concept Inventory (Computer Science Education 2014)
  • Discerning the Dominant Out-of-Order Performance Advantage: Is it Speculation or Dynamism? (ASPLOS 2013)
  • Creating the Digital Logic Concept Inventory (SIGCSE 2010)
  • A Real System Evaluation of Hardware Atomicity for Software Speculation (ASPLOS 2010)
  • Proof by Incomplete Enumeration and Other Logical Misconceptions (ICER 2008)
  • Using Hardware Memory Protection to Build a High-Performance, Strongly Atomic Hybrid Transactional Memory (ISCA 2008)
  • Branch-on-Random (CGO 2008)
  • Fundamental Performance Challenges in Horizontal Fusion of In-Order Cores (HPCA 2008)
  • Identifying Important and Difficult Concepts in Introductory Computing Courses using a Delphi Process (SIGCSE 2008) extended version
  • Hardware Atomicity for Reliable Software Speculation (ISCA 2007)
  • Transactional Memory and the Birthday Paradox (SPAA 2007)
  • Extending Hardware Transactional Memory to Support Non-busy Waiting and Non-transactional Actions (Transact 2006)
  • Probabilistic Counter Updates for Predictor Hysteresis and Stratification (HPCA 2006)
  • A Criticality Analysis of Clustering in Superscalar Processors (Micro 2005)
  • SPIMbot: An Engaging, Problem-based Approach to Teaching Assembly Language Programming (SIGCSE 2005) presentation software
  • Targeted Path Profiling (CGO-2) presentation
  • Master/Slave Speculative Parallelization (Micro-35) presentation
  • Execution-based Prediction Using Speculative Slices (ISCA-2001)

    Full list of publications

  • Teaching
  • CS 125 - Introduction to Computer Science
  •   FA08, FA13
  • CS 126 - Software Design Studio
  •   FA16, SP17, FA17
  • CS 232 - Computer Architecture II (subsumed by CS 233)
  •   FA03, SP04, FA04, SP05, SP06, SP07, FA07, SP08, FA09, SP09, FA11, SP12
  • CS 233 - Computer Architecture
  •   FA12, SP13, SP14, FA14, SP15, FA15, SP16, FA16, SP18
  • CS497/CS598cz - Dynamic Translation and Optimization
  •   FA02, SP03, FA05

    Graduate Students
  • Binglin Chen
  • Jake Bailey
  • Former Students
  • Saleem Abdulras
  • Lee Baugh
  • Michael Bond
  • Jeff Cook
  • Brandon Chong
  • Chris Eben
  • David Flint
  • Rahul Joshi
  • Geoffrey Herman
  • Bhuwan Khattar
  • Edward Lee
  • J. T. Longino
  • Partheesh Mani
  • Daniel McFarlin
  • Shoaib Meenai
  • Andrew Nicholson
  • Naveen Neelakantam
  • Jonathan Pierce
  • James Roberts
  • Nicholas Riley
  • Pierre Salverda
  • Charles Tucker
  • Tianning (Tammy) Xu
  • Changrui Yuan
  • Eric Zimmerman
  • Student Theses
      Principles of Instruction-Level Distributed Processing Pierre Salverda Ph.D. Thesis, April 2008.

      Efficient User-Mode Exception Handling in x86 Linux Chris Eben, B.S. Thesis, August 2007 (Microsoft)
      Boolean Blunders: Identification and Assessment of Student Misconceptions in a Digital Logic Course J.T. Longino, M.S. Thesis, July 2006 (AMD)
      Profile-directed If-Conversion in Superscalar Microprocessors Eric Zimmerman, M.S. Thesis, July 2005 (Citadel Investment Group)
      Design of an MSSP Verify/Commit Unit Partheesh Mani, M.S. Thesis, August 2005 (Intel Corporation)
      Limited Path Profiling and Correlated Branch Elimination Andrew Nicholson, M.S. Thesis, April 2005 (
      TraceVis: An Execution Trace Visualization Tool James Roberts, M.S. Thesis, July 2004 (nVIDIA architecture group)
      A Task Optimization Framework for MSSP Rahul Ulhas Joshi, M.S. Thesis, May 2004 (nVIDIA compiler group)
      An Assembler for the MSSP Distiller Eric Zimmerman, B.S. Thesis, May 2004 (continuing for M.S.)
      Program Orienteering Naveen Neelakantam, M.S. Thesis, April 2004 (continuing for Ph.D.)

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  • Advice for Graduate Students

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    UIUC Compiler:   Group   Seminar   Mailing List


    Contact Information:

       Siebel Center 4112
       217-244-0553 (Phone)

    Postal address:
       University of Illinois at Urbana-Champaign
       Department of Computer Science
       Siebel Center    MC-258
       201 N. Goodwin Ave.
       Urbana, IL 61801-2302