Craig Zilles's Publications For student theses, see my homepage 2019
Effect of Discrete and Continuous Parameter Variation on Difficulty in Automatic Item Generation
Predicting the difficulty of automatic item generators on exams from their difficulty on homeworks
Reducing Difficulty Variance in Randomized Assessments
Every university should have a computer-based testing facility
uAssign: Scalable Interactive Activities for Teaching the Unix Terminal 2018
Making Testing Less Trying: Lessons Learned from Operating a Computer-Based Testing Facility
How much randomization is needed to deter collaborative cheating on asynchronous exams?
Towards a Model-Free Estimate of the Limits to Student Modeling Accuracy
Student and Instructor Experiences with a Computer-Based Testing Facility 2017
I Need Your Encouragement!: Requesting Supportive Comments on Social Media Reduces Test Anxiety
Do Performance Trends Suggest Wide-spread Collaborative Cheating on Asynchronous Exams?
Investigating Student Plagiarism Patterns and Correlations to Grades 2016
Modeling Student Scheduling Preferences in a Computer-Based Testing Facility
Student Behavior in Selecting an Exam Time in a Computer-Based Testing Facility 2015
Bungee Jumps: Accelerating Indirect Branches through HW/SW Co-Design
Branch Vanguard: Decomposing Branch Functionality into Prediction and Resolution Instructions
PrairieLearn: Mastery-based Online Problem Solving with Adaptive Scoring and Recommendations Driven by Machine Learning
Computerized Testing: A Vision and Initial Experiences 2014
A Psychometric Evaluation of the Digital Logic Concept Inventory 2013
Discerning the Dominant Out-of-Order Performance Advantage: Is it Speculation or Dynamism? 2012
Describing the What and Why of Students' Difficulties in Boolean Logic
Flip-Flops in Students' Conceptions of State 2011
Students' Misconceptions about Medium-scale Integrated Circuits
How do Students Misunderstand Number Representations? 2010
Work in progress: How do Engineering Students Misunderstand Number Representations?
Setting the scope of concept inventories for introductory computing subjects
Creating the Digital Logic Concept Inventory
A Real System Evaluation of Hardware Atomicity for Software Speculation 2009
Work in progress: Students' Misconceptions About State in Digital Systems
Characterizing and Optimizing the Memory Footprint of De Novo Short Read DNA Sequence Assembly BlueShift: Designing Processors for Timing Speculation from the Ground Up Brian Greskamp, Lu Wan, Ulya Karpuzcu, Jeff Cook, Josep Torrellas, Deming Chen, Craig Zilles (HPCA 2009) 2008
Proof by Incomplete Enumeration and Other Logical Misconceptions
Using Hardware Memory Protection to Build a High-Performance, Strongly Atomic Hybrid Transactional Memory
A Characterization of Instruction-Level Error Derating and its Implications for Error Detection
An Analysis of I/O And Syscalls In Critical Sections And Their Implications for Transactional Memory
Branch-on-Random
Accurate Critical Path Analysis via Random Trace Construction
Transactional runtime extensions for dynamic language performance
Fundamental Performance Challenges in Horizontal Fusion of In-Order Cores
Identifying Important and
Difficult Concepts in Introductory Computing Courses using a Delphi
Process
"Hardware Atomicity for Reliable Software Speculation" has been selected for IEEE Micro Top Picks (2008)
2007
Accordion Arrays: Selective Compression of Unicode Arrays in Java
Implications of False Conflict Rate Trends for Robust Software Transactional Memory
An Analysis of I/O and Syscalls in Critical Sections and Their Implications for Transactional Memory
Delta Execution for Software Reliability
Dependence-based Scheduling Revisited: A Tale of Two Baselines
Hardware Atomicity for Reliable Software Speculation
Transactional Memory and the Birthday Paradox
2006
Hardware Transactional Memory Support for Lightweight Dynamic Language Evolution
Extending Hardware Transactional Memory to Support Non-busy Waiting and Non-transactional Actions
Student Misconceptions in an Introductory Logic Design Course
Probabilistic Counter Updates for Predictor Hysteresis and Stratification
2005
A Criticality Analysis of Clustering in Superscalar Processors
Probabilistic Counter Updates for Predictor Hysteresis and Bias
On the Energy Efficiency of If-Conversion in Superscalar Processors
Decomposing the Load-Store Queue by Function for Power Reduction and Scalability
Challenges to Providing Performance Isolation in Transactional Memories
"What does a CPU have in common with a fast food restaurant?" A Reflection on Emphasizing the Big Ideas of Computer Science in a Computer Organization Class
Formally Defining and Verifying Master/Slave Speculative Parallelization
TraceVis: An Execution Trace Visualization Tool
Reactive Techniques for Controlling Software Speculation
SPIMbot: An Engaging, Problem-based Approach to Teaching Assembly Language Programming
2004
Decomposing the Load-Store Queue by Function for Power Reduction and Scalability
Increasing Interactivity by Predicting User Actions
Targeted Path Profiling: Lower Overhead Path Profiling for Staged Dynamic Optimization Systems
Formal
Verification of MSSP
2002
Master/Slave
Speculative Parallelization
Master/Slave Speculative Parallelization and Approximate Code
Master/Slave Speculative
Parallelization with Distilled Programs
2001
Time-Shifted Modules: Exploiting
Code Modularity for Fine Grain Parallelism
Execution-based
Prediction Using Speculative Slices
Benchmark Health Considered
Harmful
A Programmable
Co-processor for Profiling
2000 and before
Speculative
Miss/Execute Decoupling
Understanding the
Backward Slices of Performance Degrading Instructions
The Use of
Multithreading for Exception Handling
Characterizing a Java Implementation of TPC-W
A Constraint-based God-object Method For
Haptic Display
Haptic Rendering: Programming Touch Interaction with
Virtual Objects
Haptic Rendering with the Toolhandle Haptic
Interface
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